1. Field of the Invention
The present invention relates to a plasma display apparatus and a driving method thereof.
2. Description of the Background Art
In a plasma display panel generally, barrier rib provided between front panel and rear panel forms one unit cell. Main discharge gas, such as neon (Ne), helium (He), or a combination (Ne+He) of neon and helium, and inertia gas containing a small amount of xenon are filled within each cell. Discharge being executed by high frequency voltage, the inertia gas generates vacuum ultraviolet rays and excites a phosphor provided between the barrier ribs, thereby embodying image.
FIG. 1 illustrates a driving waveform for driving a plasma display panel in a related-art plasma display apparatus.
As shown in FIG. 1, the plasma display panel is driven with a subfield divided into a reset period for initializing all cells, an address period for selecting the cell to be discharged, a sustain period for sustaining discharge of the selected cell, and an erasure period for erasing wall charges within the discharged cell.
In a setup period of a reset period, a ramp-up waveform (Ramp-up) is concurrently applied to all scan electrodes. By the ramp-up waveform, a weak dark discharge is generated within the discharge cells of a whole screen. By a setup discharge, positive wall charges are accumulated on an address electrode and a sustain electrode, and negative wall charges are accumulated on a scan electrode.
In a setdown period, after the supplying of the ramp-up waveform, a ramp-down waveform (Ramp-down), which falls starting from a positive voltage lower than a peak voltage of the ramp-up waveform to a specific voltage level of lower than a ground (GND) level voltage, generates a weak erasure discharge, thereby sufficiently erasing the wall charges excessively formed in the scan electrode. By the setdown discharge, the wall charges of an extent generating a stable address discharge uniformly remain within the cells.
In the address period, a negative scan pulse is sequentially applied to the scan electrodes and at the same time, a positive data pulse is synchronized to the scan pulse and applied to the address electrode. A voltage difference between the scan pulse and the data pulse and a wall voltage generated in the reset period being added, the address discharge is generated within the discharge cell to which the data pulse is applied.
The wall charges of the extent generating the discharge at the time of applying the sustain voltage (Vs) are formed within the cell selected by the address discharge. A positive voltage (Vz) is supplied to the sustain electrode so that a voltage difference from the scan electrode is reduced during the address period and erroneous discharge with the scan electrode is prevented.
In the sustain period, the sustain pulse (Sus) is alternately applied to the scan electrodes and the sustain electrodes. In the cell selected by the address discharge, the wall voltage within the cell and the sustain pulse being added, whenever each sustain pulse is applied, the sustain discharge, that is, a display discharge between the scan electrode and the sustain electrode is generated.
After the sustain discharge is completed, in the erasure period, a voltage of an erasure ramp waveform (Ramp-ers) whose pulse width and voltage level are low is supplied to the sustain electrode, thereby erasing the wall charges remaining within the cells of the whole screen.
In the plasma display panel, the driving waveform is supplied every subfield of the frame.
Meantime, a rising ramp (Ramp-up) supplied to the scan electrode in the reset period is generally equal to a high voltage pulse of about 400 V and thus, an amount of light generated depending on discharge caused by the rising ramp relatively gets larger. Accordingly, luminance in an off state of all the discharge cells of the plasma display panel, that is, a black luminance relatively gets larger, thereby deteriorating a characteristic of contrast.